Taiwan’s TSMC could expand to Japan, a report claims

More than half a year ago, we reported that a Japanese consortium wants to challenge TSMC and Samsung by producing chips using a 2nm process node by 2027.

Now, there’s an exclusive Reuters report claiming that TSMC is considering an expansion to Japan.

TSMC, supplier of Apple’s silicon chips for iPhones and iPads, could build an advanced packaging capacity in Japan, according to two sources familiar with the matter.

“One option the chipmaking giant is considering is bringing its chip on wafer on substrate (CoWoS) packaging technology to Japan, according to one of the sources who was briefed on the matter”, reads the report.

The Chip on Wafer on Substrate (CoWoS) packaging technology is a method used in creating electronic circuits where multiple chips are first mounted on a semiconductor wafer, and then the entire assembly is attached to a larger substrate. This technique allows for a high-density integration of chips, enabling the creation of more compact and efficient electronic devices. The process involves stacking chips vertically and connecting them both to each other and to the substrate below.

It’s like building a mini skyscraper on a tiny piece of land. This method lets you fit a lot more power into a small space, kind of like stacking apartments to make the most of a small plot of land in a city. It's a smart way to make electronic devices smaller, faster, and more efficient.

Currently, all of TSMC's CoWoS capacity is in Taiwan.

Demand for advanced semiconductor packaging has surged globally in tandem with the artificial intelligence boom, spurring chipmakers, including TSMC, Samsung Electronics and Intel, to boost capacity.

TSMC said it was planning additional advanced packaging capacity in Chiayi in southern Taiwan to respond to strong market demand.